<code id="obzzi"><ol id="obzzi"></ol></code>
      <meter id="obzzi"></meter>
    1. <meter id="obzzi"><u id="obzzi"></u></meter>
    2. S3C44B0


      型號 封裝 在線定購
      S3C44B0X01-ED80(查看) 160LQFP


      技術資料—— S3C44B0 PDF技術資料

      S3C44B0 概述

      SAMSUNG's S3C44B0 16/32-bit RISC microprocessor is designed to provide a cost-effective and high performance micro-controller solution for hand-held devices and general applications. To reduce total system cost, S3C44B0 / S3C44B0X also provides the following: 8KB cache, optional internal SRAM, LCD controller, 2-channel UART with handshake, 4-channel DMA, System manager (chip select logic, FP/ EDO/SDRAM controller), 5-channel timers with PWM, I/O ports, RTC, 8-channel 10-bit ADC, IIC-BUS interface, IIS-BUS interface, Sync. SIO interface and PLL for clock.

      The S3C44B0 was developed using a ARM7TDMI core, 0.25 um CMOS standard cells, and a memory compiler. Its low-power, simple, elegant and fully static design is particularly suitable for cost-sensitive and power sensitive applications. Also S3C44B0 / S3C44B0X adopts a new bus architecture, SAMBA II (SAMSUNG ARM CPU embedded Microcontroller Bus Architecture).

      An outstanding feature of the S3C44B0 is its CPU core, a 16/32-bit ARM7TDMI RISC processor (66MHz) designed by Advanced RISC Machines, Ltd. The architectural enhancements of ARM7TDMI include the Thumb decompressor, an on-chip ICE breaker debug support, and a 32-bit hardware multiplier. By providing a complete set of common system peripherals, the S3C44B0 / S3C44B0X minimizes overall system costs and eliminates the need to configure additional components.

      S3C44B0 特性

      • S3C44B0X: the X Version of the S3C44B0
      • 2.5V Static ARM7TDMI CPU core with 8KB cache . (SAMBA II bus architecture up to 66MHz)
      • External memory controller. (FP/EDO/SDRAM Control, Chip Select logic)
      • LCD controller (up to 256 color DSTN) with 1-ch LCD-dedicated DMA.
      • 2-ch general DMAs / 2-ch peripheral DMAs with external request pins
      • 2-ch UART with handshake(IrDA1.0, 16-byte FIFO) / 1-ch SIO
      • 1-ch multi-master IIC-BUS controller
      • 1-ch IIS-BUS controller
      • 5-ch PWM timers & 1-ch internal timer
      • Watch Dog Timer
      • 71 general purpose I/O ports / 8-ch external interrupt source
      • Power control: Normal, Slow, Idle, and Stop mode
      • 8-ch 10-bit ADC.
      • RTC with calendar function.
      • On-chip clock generator with PLL.